One of the core competencies of ACTL is the test and diagnosis of failing ICs. We specialize in developing state-of-the-art test and diagnosis methodologies for advanced-node circuits. One unique capability of our lab is the design of logic characterization vehicles (i.e., test chips) that are both transparent to failure and reflective of real-world designs. Over 60 of our test-chip designs have been fabricated in various technology nodes, including 7nm, and data collected from a large volume of chips is being routinely analyzed.

Our latest work, in collaboration with Stanford and our industrial partners, involves the development and validation of new physically-aware fault models and diagnosis algorithms. As far as we know, we are only academic group in the world whose tests and diagnosis routines are being applied to in-production 5nm chips.