Publications

Patents

  1. United States Patent Application No. 2020/0380371, R. Ding, Z. Liu, T.-W, Chin, D. Marculescu, R. D. Blanton “Flexible, lightweight quantized deep neural networks,” Filed May. 2020.

  2. United States Patent Application No. 2020/048380, R. D. Blanton "METHOD FOR SECURING LOGIC CIRCUITS," Filed Aug. 2020

  3. United States Patent Application No. 16/986963, R. D. Blanton and S. Mittal “INTEGRATED CIRCUIT DEFECT DIAGNOSIS USING MACHINE LEARNING,” Filed Aug. 2020.

  4. United States Patent Application No. 10,069,635, R. D. Blanton and B. Niewenhuis "Methods and Systems for Achieving System-level Counterfeit Protection in Integrated Chips," Issued Sept. 4, 2020

  5. United States Patent Application No. 12/980,703, W. Tam and R. D. Blanton “Method and System for Systematic Defect Identification,” Issued Aug. 13, 2013.

  6. United States Patent Application No. 11/651,782, R. D. Blanton, R. Desineni, and W. Maly, “Using neighborhood functions to extract logical models of physical failures using layout based diagnosis,” Issued Aug. 3, 2010.

  7. United States Patent Application No. 12/473,749, X. Li, R. Rutenbar and R. D. Blanton “Virtual Probe for Low-Cost Testing and Characterization for Integrated Circuits,” Filed May 2009.

  8. United States Patent No. 7,340,956, N. Deb and R. D. Blanton, “Built-in Self Test for MEMS,” Issued March 11, 2008.

  9. United States Patent No. 7,325,180, L. Pileggi, P. Yue, T. Vogels, and R. D. Blanton, “System and Method to Test Integrated Circuits on a Wafer,” Issued Jan. 29, 2008.

  10. United States Patent No. 7,152,474, N. Deb and R. D. Blanton, “Built-in Self Test for MEMS,” Issued Dec. 6, 2006.

  11. United States Patent No. 6,836,856, R. D. Blanton “Method for Characterizing, Generating Test Sequences for, and/or Stimulating Integrated Circuit Faults Using Fault Tuples and Related Systems and Computer Programs and Products,” Issued Dec. 28, 2004.

Advanced   Chip   
Test  Laboratory.

The Advanced Chip Test Laboratory (ACTL) at Carnegie Mellon University develops and implements data-mining techniques for improving the operation, design, manufacturing and testing of integrated systems. Our research involves data-mining algorithm development, data analysis, chip design and fabrication in collaboration with various industrial partners that currently include IBM, NVIDIA, Qualcomm, CISCO Systems, Intel, GlobalFoundries, and ARM. The founder and head of ACTL is Prof. Shawn Blanton.

Advanced Chip Test Laboratory,

5000 Forbes Ave, Pittsburgh,PA 15213-3890

Tel: 412.268.2987

Email: rblanton@andrew.cmu.edu

ACTL .

© Copyrigh-Advanced Chip Test Laboratory.Updated 1/10/2021